
#ifndef _WHALE_REG_DEF_H_
#define _WHALE_REG_DEF_H_

#ifndef BIT
#define BIT(x) (1<<x)
#endif

#include <config.h>

#include "./chip_roc1/hardware.h"
#include <power/pmic_glb_reg.h>
#include "./chip_roc1/ai_apb.h"
#include "./chip_roc1/ai_clk_core.h"
#include "./chip_roc1/ai_dvfs_apb.h"
#include "./chip_roc1/anlg_phy_g17.h"
#include "./chip_roc1/anlg_phy_g9.h"
#include "./chip_roc1/ap_dvfs_apb.h"
#include "./chip_roc1/master_ctrl_aon.h"
#include "./chip_roc1/pre_div_clk_gen.h"
#include "./chip_roc1/reg_fw2_aon.h"
#include "./chip_roc1/ai_dvfs_apb.h"
#include "./chip_roc1/anlg_phy_g18.h"
#include "./chip_roc1/anlg_phy_pcie3.h"
#include "./chip_roc1/aud_cp_ahb.h"
#include "./chip_roc1/master_ctrl_ap.h"
#include "./chip_roc1/pub_ahb.h"
#include "./chip_roc1/scc_apb.h"
#include "./chip_roc1/analog_usb30_cfga.h"
#include "./chip_roc1/anlg_phy_g19.h"
#include "./chip_roc1/anlg_phy_top.h"
#include "./chip_roc1/aud_cp_apb.h"
#include "./chip_roc1/master_ctrl_ipa.h"
#include "./chip_roc1/pub_apb.h"
#include "./chip_roc1/slv_fw_aon0.h"
#include "./chip_roc1/anlg_phy_g0.h"
#include "./chip_roc1/anlg_phy_g1.h"
#include "./chip_roc1/anlg_top_1.h"
#include "./chip_roc1/audcp_dvfs_ahb.h"
#include "./chip_roc1/mem_fw_aon.h"
#include "./chip_roc1/pub_clk_core.h"
#include "./chip_roc1/slv_fw_aon1.h"
#include "./chip_roc1/anlg_phy_g10.h"
#include "./chip_roc1/anlg_phy_g2_ap.h"
#include "./chip_roc1/aon_apb.h"
#include "./chip_roc1/dmc_bist_apb.h"
#include "./chip_roc1/mem_fw_pub.h"
#include "./chip_roc1/pub_qosc_ahb.h"
#include "./chip_roc1/slv_fw_ap0.h"
#include "./chip_roc1/anlg_phy_g11.h"
#include "./chip_roc1/anlg_phy_g2_side.h"
#include "./chip_roc1/aon_clk_core.h"
#include "./chip_roc1/ese_clk_top.h"
#include "./chip_roc1/mm_ahb.h"
#include "./chip_roc1/mm_clk_core.h"
#include "./chip_roc1/slv_fw_ap1.h"
#include "./chip_roc1/anlg_phy_g12.h"
#include "./chip_roc1/anlg_phy_g3.h"
#include "./chip_roc1/aon_dbg_apb.h"
#include "./chip_roc1/ese_top_ahb.h"
#include "./chip_roc1/mm_dvfs_ahb.h"
#include "./chip_roc1/reg_fw0_aon.h"
#include "./chip_roc1/slv_fw_ipa0.h"
#include "./chip_roc1/anlg_phy_g13.h"
#include "./chip_roc1/anlg_phy_g4.h"
#include "./chip_roc1/aon_sec_apb.h"
#include "./chip_roc1/gpu_apb.h"
#include "./chip_roc1/mphy_cfga.h"
#include "./chip_roc1/reg_fw0_ap.h"
#include "./chip_roc1/slv_fw_ipa1.h"
#include "./chip_roc1/anlg_phy_g14.h"
#include "./chip_roc1/anlg_phy_g5.h"
#include "./chip_roc1/ap_ahb.h"
#include "./chip_roc1/gpu_dvfs_apb.h"
#include "./chip_roc1/reg_fw0_ipa.h"
#include "./chip_roc1/top_dvfs_apb.h"
#include "./chip_roc1/anlg_phy_g15.h"
#include "./chip_roc1/anlg_phy_g6.h"
#include "./chip_roc1/ap_apb.h"
#include "./chip_roc1/ap_clk_core.h"
#include "./chip_roc1/pipe_cfga.h"
#include "./chip_roc1/reg_fw1_aon.h"
#include "./chip_roc1/anlg_phy_g16.h"
#include "./chip_roc1/anlg_phy_g8.h"
#include "./chip_roc1/apcpu_dvfs_apb.h"
#include "./chip_roc1/ipa_ahb.h"
#include "./chip_roc1/pmu_apb.h"
#include "./chip_roc1/reg_fw1_ap.h"
#include "./chip_roc1/redefine.h"
#include "./chip_roc1/pinmap.h"
#include "./chip_roc1/ipa_clk_core.h"

#endif

